<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE ArticleSet PUBLIC "-//NLM//DTD PubMed 2.7//EN" "https://dtd.nlm.nih.gov/ncbi/pubmed/in/PubMed.dtd">
<ArticleSet>
<Article>
<Journal>
				<PublisherName>Amol University of Special Modern Technologies</PublisherName>
				<JournalTitle>Caspian Journal of Engineering Modern Technologies</JournalTitle>
				<Issn>3060-5709</Issn>
				<Volume></Volume>
				<Issue>Articles in Press</Issue>
				<PubDate PubStatus="epublish">
					<Year>2025</Year>
					<Month>01</Month>
					<Day>16</Day>
				</PubDate>
			</Journal>
<ArticleTitle>A Light Procedure to Analyse the CNTFET Behaviour in Sub-Threshold Region for Ultra-low Power Applications</ArticleTitle>
<VernacularTitle></VernacularTitle>
			<FirstPage></FirstPage>
			<LastPage></LastPage>
			<ELocationID EIdType="pii">213517</ELocationID>
			
			
			<Language>EN</Language>
<AuthorList>
<Author>
					<FirstName>Roberto</FirstName>
					<LastName>Marani</LastName>
<Affiliation>Institute of Intelligent Industrial Technologies and Systems for Advanced Manufacturing (STIIMA), National Research Council of Italy, 70125, Bari, Italy</Affiliation>

</Author>
<Author>
					<FirstName>Anna Gina</FirstName>
					<LastName>Perri</LastName>
<Affiliation>Electronic Devices Laboratory, Department of Electrical and Information Engineering, Polytechnic University of Bari, 70126, Bari, Italy</Affiliation>
<Identifier Source="ORCID">0000-0003-4949-987X</Identifier>

</Author>
</AuthorList>
				<PublicationType>Journal Article</PublicationType>
			<History>
				<PubDate PubStatus="received">
					<Year>2024</Year>
					<Month>08</Month>
					<Day>26</Day>
				</PubDate>
			</History>
		<Abstract>&lt;em&gt;The aim of this paper is to propose a procedure to analyze the behavior of Carbon NanoTube Field Effect Transistors (CNTFETs) operating in sub-threshold region for ultra-low power applications, through the design of a SRAM cell, in which we use a CNTFET model, already proposed by us. The proposed technique allows to obtain easily static, dynamic and transient analysis, in order to determine the optimal operating condition.  All simulations are carried out using the software Advanced Design System (ADS), which is compatible with the Verilog-A programming language.  &lt;/em&gt;</Abstract>
		<ObjectList>
			<Object Type="keyword">
			<Param Name="value">Nanodevices</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">CNTFET</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">modelling</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">Digital Circuits</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">SRAM cell</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">Verilog-A</Param>
			</Object>
		</ObjectList>
</Article>
</ArticleSet>
